In this post, you will learn how an electronics failure analysis lab uses a FIB for Wafer Lot Acceptance during design verification. In the current era of System-on-Chip (SoC) designs with 10 and 11 metal layers, copper metallizations, exotic dielectric materials, and
“At the end of the day, these tests are your mission insurance, and DLA lab suitability ensures we’re meeting the high-reliability requirements of the military standards.” – Marti McCurdy
Ep. 30: Assembling a Circuit Card with Spirit’s In-House Partner Latham Industries Get the inside scoop on industry news and technology! In this podcast, Spirit Electronics CEO Marti McCurdy talks with aerospace and defense experts about high-reliability components and industry-rocking
Ep. 29: Renesas High-Reliability Components: Production Excellence and Flight Heritage for New and Deep Space Get the inside scoop on industry news and technology! In this podcast, Spirit Electronics CEO Marti McCurdy talks with aerospace and defense experts about high-reliability